Embodiments of the invention relate to a semiconductor device, and more particularly to a technology for reducing refresh peak noise.
In recent times, the multi-channel semiconductor memory device has recently been proposed, which provides a large bandwidth and is highly integrated. The multi-channel semiconductor memory device includes a plurality of memories in a single chip, and each memory includes an input/output (I/O) pad so that it can be operated as a separate memory device. That is, each memory of the multi-channel semiconductor memory device may operate as an independent memory device for independently inputting/outputting an address, a command, and data.
Each channel for use in the multi-channel semiconductor memory device receives a command and an address separately from each other, such that each channel can be independently operated. Therefore, respective banks allocated to each channel are sequentially refreshed at intervals of a predetermined time within the tRFC time.
However, the multi-channel semiconductor memory device shares an internal voltage per channel, so that the multi-channel semiconductor memory device unavoidably has a serious defect under a condition in which all channels are simultaneously operated. That is, although banks contained in respective channels are sequentially refreshed, if all channels are simultaneously refreshed, the respective channels can be sequentially refreshed at intervals of a predetermined time. From the viewpoint of all chips, refresh times of the respective channels overlap with each other, resulting in increased peak noise.